Nugroho's blog.

Monday, June 1, 2015

The Twangy Vox


This guitar amp suddenly became my first and favorite over the others.

It's small. The Vox amPlug 2 have size of well, jack-plug, :).

It's complete, for me. It has a distortion, of course, with three boost (Classic Rock) of choice, no less.

The FX maybe just chorus, delay and reverb but it doesn't matter. I don't se that anyway.

The most interesting? Yeah, the sound.
 
No matter guitar and setting you'd use. It always have a classic-Telecaster-twangy sound in it. I use my super strat model guitar (Cort with HSH pickup conf) and it's twangy.

I use my Ephipone Les Paul, with the brigde pickup and the tones turned down, and it's still twangy.

Maybe not anyone like this characteristic. But for me, it's blessing, :)

(How about plug it on Tele? :) )

Mugello


Lorenzo win.

Of course we're focused on double duel (battle royal? :) ) for 2nd position of two Honda and Ducati. Before Dovis gear started trouble and Marquez lost the tyre grip.

Rossi's great too, from 8th to 3rd. The only rider that always finished in podium this  season.

Lorenzo, Iannone, Rossi

Saturday, May 30, 2015

Timer Time: Using Internal ATTiny13A Chip’s Timer, "OVF" Interrupt Mode (slightly modified)


We could speeding the timer by pre-loading TCNT0 with a value between 0 and 255, so TCNT0’ll start count at our own value instead of zero. 

We have to pre-load the TCNT0 at the init subroutine, and pre-load again after flag is set, so we write the command at the timer subroutine. 

So, our code now will look like this 

.include "../tn13Adef.inc"
.def a=r16
.org 0000
    rjmp init
.org 0003
    rjmp timer

init:
    sbi ddrb,0          ; pin b0 output
    ldi a,0b00000101    ; prescaler 1024
    out TCCR0B,a
    ldi a,0b00000010    ; enable OVF
    out TIMSK0,a
    ldi a, 64           ; preload TCNT0
    out TCNT0,a
    sei                 ; enable interrupts globally
    
main:
    rjmp main

timer:
    sbi pinb,0          ; flip pin B0 bit
    ldi a,64            ; preload again 
    out TCNT0,a
    reti

    
    



Timer Time: Using Internal ATTiny13A Chip’s Timer, "OVF" Interrupt Mode


Using interrupt, we have a subroutine that regularly called, automatically.
It called when overflow flag (OVF) is set.

As always, the timer/counter (TCNT0 register) counts up from zero toward 255, called an interrupt and rolls over back to zero and starts counts up again. 

We could set the output at the interrupt subroutine so we eventually have nothing to do at the main program.

main:
rjmp main




If we enabled interrupts, the system looks an  interrupt vector table at the bottom of memory, .org 000; composed of jumps to routines series.

OVF interrupt located at .org 0003

The first interrupt is, of course, power on or reset or initial condition, you named it…

We have to jump to it (using rjmp init) to set initial condition of our system when it connected to power source, or reset-ed. On this program we set pre-scaler to 1024, enabling OVF mode and of course enabling interrupts globally

The interrupt routine itself is only consist of toggle pinb,0 command  


.include "../tn13Adef.inc"
.def a=r16
.org 0000
    rjmp init
.org 0003
    rjmp timer

init:
    sbi ddrb,0          ; pin b0 output
    ldi a,0b00000101    ; prescaler 1024
    out TCCR0B,a
    ldi a,0b00000010    ; enable OVF
    out TIMSK0,a
    sei                 ; enable interrupts globally
    
main:
    rjmp main

timer:
    sbi pinb,0          ; flip pin B0 bit
    reti
    
    

.

Friday, May 29, 2015

Timer Time: Using Internal ATTiny13A Chip’s Timer “CTC” Mode


Clear Timer on Compare (CTC) as its name suggests, will clear the flag if counter has same value with compare value. 
Thus, TCNT0 still count fram zero to 255, but if we set OCR0A on 64, timer will clear the flag at 64, restart counter to zero and count up again.
If we set OCR0A to 255, then it’ll behave like normal timer in 'Normal’ Mode.
If OCR0A value’s lower, then the delay time is faster/shorter.
Here's the code. OCF0A is compare flag, the bit-3 on TIFR0 register.
Notice that we have to set TCCR0A register to enable CTC mode; in Normal mode we don’t have to do that.


.include "../tn13Adef.inc"
.def a=r16
.org 0000

init:
    sbi ddrb,0          ; pin b0 output
    ldi a, 0b01000010   ; CTC mode
    out TCCR0A,a
    ldi a,0b00000101    ; prescaler 1024
    out TCCR0B,a
    ldi a,255           ; compare value (emulating normal mode, set to lower value for shorter d)
    out OCR0A,a
main:
    sbi pinb,0          ; flip the B0 bit
    rcall timer
    rjmp main

timer:
        loop:
    in a,TIFR0          ; wait 
    andi a, 0b00000100  ; (1<<OCF0A) is OCF0A 
    breq loop
    
    ldi a, 0b00000100   ; set OCF0A to 1 again after flagged
    out TIFR0,a
    
    ret
    

    

.

Timer Time: Using Internal ATTiny13A Chip’s Timer “Normal” Mode (Slightly Modified)

Our timer is static, it have to wait TCNT0 to count from 0 to 255 and then start over.

We could modify it so it count from x to 255 to make it count faster

so we need to pre-set/pre-load TCNT0 to some value

ldi a, 200
out TCNT0,a

With that, we could make the delay time faster. Set the TCNT0 to lower value for longer delay



We  need to modify it

.include "../tn13Adef.inc"
.def a=r16
.org 0000

init:
    sbi ddrb,0          ; pin b0 output
    ldi a,0b00000101    ; prescaler 1024
    out TCCR0B,a
    
main:
    sbi pinb,0          ; flip the B0 bit
    rcall timer
    ldi a,200           ; set lower for longer delay
    out TCNT0,a
    rjmp main

timer:
        loop:
    in a,TIFR0          ; wait 
    andi a, 0b00000010  ; (1<<TOV0) is TOV0 still 1 or flagged to 0?
    breq loop
    
    ldi a, 0b00000010   ; set TOV0 to 1 again after flagged
    out TIFR0,a
    
    ret
    

    


    

Timer Time: Using Internal ATTiny13A Chip’s Timer “Normal” Mode


Chip’s Internal Timer in ’Normal' mode will count from 0 to 255, set the overflow flag TOV0 to 0 and count again from 0 to 255, set the flag to 0 and so on. 

As usual, I used LED as output indicator on Port B0

We used 1024 for pre-scaler/divider value. Set the TCCR0B to 0000 0101

Note that we have to reset the overflow flag to 1 after timer count reached 255 (and set the flag to 0). 

Oh, by the way, the register/variable/things that count from 0 to 255 is called TCNT0. We didn’t touch it in the code this time, maybe next. 



.include "../tn13Adef.inc"
.def a=r16
.org 0000

init:
    sbi ddrb,0          ; pin b0 output
    ldi a,0b00000101    ; prescaler 1024
    out TCCR0B,a
    
main:
    sbi pinb,0          ; flip the B0 bit
    rcall timer
    rjmp main

timer:
        loop:
    in a,TIFR0          ; wait 
    andi a, 0b00000010  ; (1<<TOV0) is TOV0 still 1 or flagged to 0?
    breq loop
    
    ldi a, 0b00000010   ; set TOV0 to 1 again after flagged
    out TIFR0,a
    
    ret
    
    


Last login: Thu May 28 11:54:47 on ttys001
Nugrohos-MacBook-Air:~ nugroho$ cd attiny13a/timer/
Nugrohos-MacBook-Air:timer nugroho$ avra -o timerNormal.hex timerNormal.s
AVRA: advanced AVR macro assembler Version 1.3.0 Build 1 (8 May 2010)
Copyright (C) 1998-2010. Check out README file for more info

AVRA is an open source assembler for Atmel AVR microcontroller family
It can be used as a replacement of 'AVRASM32.EXE' the original assembler
shipped with AVR Studio. We do not guarantee full compatibility for avra.

AVRA comes with NO WARRANTY, to the extent permitted by law.
You may redistribute copies of avra under the terms
of the GNU General Public License.
For more information about these matters, see the files named COPYING.

Pass 1...
Pass 2...
done

Used memory blocks:
Code : Start = 0x0000, End = 0x000B, Length = 0x000C

Assembly complete with no errors.
Segment usage:
Code : 12 words (24 bytes)
Data : 0 bytes
EEPROM : 0 bytes
Nugrohos-MacBook-Air:timer nugroho$ vavrdisasm timerNormal.s.hex
0: 9a b8 sbi $17, 0
2: e0 05 ldi R16, 0x05
4: bf 03 out $33, R16
6: 9a b0 sbi $16, 0
8: d0 01 rcall .+2 ; 0xc
a: cf fd rjmp .-6 ; 0x6
c: b7 08 in R16, 0x38
e: 70 02 andi R16, 0x02
10: f3 e9 breq .-6 ; 0xc
12: e0 02 ldi R16, 0x02
14: bf 08 out $38, R16
16: 95 08 ret
Nugrohos-MacBook-Air:timer nugroho$
Nugrohos-MacBook-Air:timer nugroho$ avrdude -p t13 -P usb -c usbasp -B4 -n

avrdude: set SCK frequency to 187500 Hz
avrdude: AVR device initialized and ready to accept instructions

Reading | ################################################## | 100% 0.00s

avrdude: Device signature = 0x1e9007

avrdude: safemode: Fuses OK (H:FF, E:FF, L:6A)

avrdude done. Thank you.

Nugrohos-MacBook-Air:timer nugroho$ avrdude -p t13 -P usb -c usbasp -B4 -U flash:w:timerNormal.s.hex

avrdude: set SCK frequency to 187500 Hz
avrdude: AVR device initialized and ready to accept instructions

Reading | ################################################## | 100% 0.00s

avrdude: Device signature = 0x1e9007
avrdude: NOTE: "flash" memory has been specified, an erase cycle will be performed
To disable this feature, specify the -D option.
avrdude: erasing chip
avrdude: set SCK frequency to 187500 Hz
avrdude: reading input file "timerNormal.s.hex"
avrdude: input file timerNormal.s.hex auto detected as Intel Hex
avrdude: writing flash (24 bytes):

Writing | ################################################## | 100% 0.02s

avrdude: 24 bytes of flash written
avrdude: verifying flash memory against timerNormal.s.hex:
avrdude: load data flash data from input file timerNormal.s.hex:
avrdude: input file timerNormal.s.hex auto detected as Intel Hex
avrdude: input file timerNormal.s.hex contains 24 bytes
avrdude: reading on-chip flash data:

Reading | ################################################## | 100% 0.01s

avrdude: verifying ...
avrdude: 24 bytes of flash verified

avrdude: safemode: Fuses OK (H:FF, E:FF, L:6A)

avrdude done. Thank you.

Nugrohos-MacBook-Air:timer nugroho$

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