Timer Time: Using Internal ATTiny13A Chip’s Timer, CTC with Automatic Mode

What if we want it to do the task automatically? With neither interrupt routine nor call command?.

We could use CTC mode . The TCNT0 will start counting up, restarted to zero (and generate interrupt) if its value reaches OCR0A value (the compare value we set).

Since, in the matter of talking, the timer has its flag status on pin B0, if we set it as output, we could see the status (high/low, on off) via led connected to it and ground.  

Note that we don’t use ‘interrupt routine’ but the system’s still generate an interrupt.

.include "../tn13Adef.inc"

.def a=r16

.org 0000

init:

sbi ddrb,0              ; pinb as output 

ldi a,0b01000010        ; CTC mode

out TCCR0A,a

ldi r16,0b00000101      ; pre-scaler /1024

    out TCCR0B,a

    ldi a,200                ; compare value

    out OCR0A,a             

loop:

rjmp loop

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Alfa, 35 Month Ago

A photo posted by Aravir Rose (@nugnux) on Jul 27, 2012 at 8:20pm PDT

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The Twangy Vox

This guitar amp suddenly became my first and favorite over the others.

It's small. The Vox amPlug 2 have size of well, jack-plug, :).

It's complete, for me. It has a distortion, of course, with three boost (Classic Rock) of choice, no less.

The FX maybe just chorus, delay and reverb but it doesn't matter. I don't se that anyway.

The most interesting? Yeah, the sound.
 
No matter guitar and setting you'd use. It always have a classic-Telecaster-twangy sound in it. I use my super strat model guitar (Cort with HSH pickup conf) and it's twangy.

I use my Ephipone Les Paul, with the brigde pickup and the tones turned down, and it's still twangy.

Maybe not anyone like this characteristic. But for me, it's blessing, :)

(How about plug it on Tele? :) )

Mugello

Lorenzo win.

Of course we're focused on double duel (battle royal? :) ) for 2nd position of two Honda and Ducati. Before Dovis gear started trouble and Marquez lost the tyre grip.

Rossi's great too, from 8th to 3rd. The only rider that always finished in podium this  season.

Lorenzo, Iannone, Rossi

Timer Time: Using Internal ATTiny13A Chip’s Timer, "OVF" Interrupt Mode (slightly modified)

We could speeding the timer by pre-loading TCNT0 with a value between 0 and 255, so TCNT0’ll start count at our own value instead of zero. 

We have to pre-load the TCNT0 at the init subroutine, and pre-load again after flag is set, so we write the command at the timer subroutine. 

So, our code now will look like this 

.include "../tn13Adef.inc"

.def a=r16

.org 0000

    rjmp init

.org 0003

    rjmp timer

init:

    sbi ddrb,0          ; pin b0 output

    ldi a,0b00000101    ; prescaler 1024

    out TCCR0B,a

    ldi a,0b00000010    ; enable OVF

    out TIMSK0,a

    ldi a, 64           ; preload TCNT0

    out TCNT0,a

    sei                 ; enable interrupts globally

    

main:

    rjmp main

timer:

    sbi pinb,0          ; flip pin B0 bit

    ldi a,64            ; preload again 

    out TCNT0,a

    reti

    

    

Timer Time: Using Internal ATTiny13A Chip’s Timer, "OVF" Interrupt Mode

Using interrupt, we have a subroutine that regularly called, automatically.

It called when overflow flag (OVF) is set.

As always, the timer/counter (TCNT0 register) counts up from zero toward 255, called an interrupt and rolls over back to zero and starts counts up again. 

We could set the output at the interrupt subroutine so we eventually have nothing to do at the main program.

main:
 rjmp main

If we enabled interrupts, the system looks an  interrupt vector table at the bottom of memory, .org 000; composed of jumps to routines series.

OVF interrupt located at .org 0003

The first interrupt is, of course, power on or reset or initial condition, you named it…

We have to jump to it (using rjmp init) to set initial condition of our system when it connected to power source, or reset-ed. On this program we set pre-scaler to 1024, enabling OVF mode and of course enabling interrupts globally

The interrupt routine itself is only consist of toggle pinb,0 command  

.include "../tn13Adef.inc"

.def a=r16

.org 0000

    rjmp init

.org 0003

    rjmp timer

init:

    sbi ddrb,0          ; pin b0 output

    ldi a,0b00000101    ; prescaler 1024

    out TCCR0B,a

    ldi a,0b00000010    ; enable OVF

    out TIMSK0,a

    sei                 ; enable interrupts globally

    

main:

    rjmp main

timer:

    sbi pinb,0          ; flip pin B0 bit

    reti

    

    

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Timer Time: Using Internal ATTiny13A Chip’s Timer “CTC” Mode

Clear Timer on Compare (CTC) as its name suggests, will clear the flag if counter has same value with compare value. 

Thus, TCNT0 still count fram zero to 255, but if we set OCR0A on 64, timer will clear the flag at 64, restart counter to zero and count up again.

If we set OCR0A to 255, then it’ll behave like normal timer in 'Normal’ Mode.

If OCR0A value’s lower, then the delay time is faster/shorter.

Here's the code. OCF0A is compare flag, the bit-3 on TIFR0 register.

Notice that we have to set TCCR0A register to enable CTC mode; in Normal mode we don’t have to do that.

.include "../tn13Adef.inc"

.def a=r16

.org 0000

init:

    sbi ddrb,0          ; pin b0 output

    ldi a, 0b01000010   ; CTC mode

    out TCCR0A,a

    ldi a,0b00000101    ; prescaler 1024

    out TCCR0B,a

    ldi a,255           ; compare value (emulating normal mode, set to lower value for shorter d)

    out OCR0A,a

main:

    sbi pinb,0          ; flip the B0 bit

    rcall timer

    rjmp main

timer:

        loop:

    in a,TIFR0          ; wait 

    andi a, 0b00000100  ; (1<<OCF0A) is OCF0A 

    breq loop

    

    ldi a, 0b00000100   ; set OCF0A to 1 again after flagged

    out TIFR0,a

    

    ret

    

    

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